Synthesis of Partitionable Multistage Networks.

Abstract

Two methods have been used to speed up the execution of computation. One is the technology insertion and the other is new architectural concept. Regardless of the type of architecture development the result is a parallel computer systems with a large number of processing elements. The communication requirements between the processing elements will lead to the need for a large interconnection networks. In this research a property of interconnection networks called partitionability is studied. The advantages and uses of partitionable networks were described in number of papers. The partitionability informally means that the system can be divided into several parts each of which has certain amount of behavioral independence. Several researchers have analyzed both topologically regular and irregular interconnection networks with respect to the partitionally property. In this work the concern is synthesis techniques of partitionable networks. Two algorithms are developed each capable of synthesizing a class of partionable interconnection networks. The generated classes are informally described.

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Document Details

Document Type
Technical Report
Publication Date
Nov 01, 1986
Accession Number
ADA174812

Tags

DTIC Thesaurus Topics

  • Algorithms
  • Circuit Boards
  • Computations
  • Computer Architecture
  • Computers
  • Computing System Architectures
  • Control
  • Decomposition
  • Distributed Computing
  • Electrical Engineering
  • Graph Theory
  • Image Processing
  • Networks
  • Notation
  • Printed Circuit Boards
  • Printed Circuits
  • Universities

Fields of Study

  • Computer science

Readers

  • Computer Networking
  • Computer Vision.
  • Integrated Circuit Design and Technology.