Sparse Elimination on Vector Multiprocessors.

Abstract

The availability of instruction-level simulators for the CRAY X-MP and the CRAY-2, together with early access to the MFECC and NAS CRAY-2's, has made possible the study of a variety of equation-solving issues for many-processor VMP configurations. These include: (1) the development of equation-solving algorithms on the CRAY-2, and; (2) task granularity studies; and (3) memory conflict studies.

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Document Details

Document Type
Technical Report
Publication Date
Apr 15, 1986
Accession Number
ADA175121

Entities

People

  • Donald Albert Calahan

Organizations

  • University of Michigan

Tags

DTIC Thesaurus Topics

  • Abstracts
  • Air Force
  • Algorithms
  • Availability
  • Computer Science
  • Computers
  • Electrical Engineering
  • Elimination
  • Engineering
  • Equations
  • Instructions
  • Linear Algebra
  • Multiprocessors
  • Parallel Computing
  • Security
  • Simulations
  • Simulators

Readers

  • Parallel and Distributed Computing.