Reducing the Cost of Branches

Abstract

Pipelining is the major organizational technique that computers use to reach higher single-processor performance. A fundamental disadvantage of pipelining is the loss incurred due to branches that require stalling or flushing the pipeline. Both hardware solutions and architectural changes have been proposed to overcome these problems. This paper examines a range of schemes for reducing branch cost focusing on both static (compile-time) and dynamic (hardware-assisted) prediction of branches. These schemes are investigated from quantitative performance and implementation viewpoints.

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Document Details

Document Type
Technical Report
Publication Date
Jan 01, 1987
Accession Number
ADA177638

Entities

People

  • John Hennessy
  • Scott Mcfarling

Organizations

  • Stanford University

Tags

DTIC Thesaurus Topics

  • Accuracy
  • Algorithms
  • Coding
  • Collisions
  • Compilers
  • Computations
  • Computing System Architectures
  • Cost Reductions
  • Costs
  • Decoding
  • Frequency
  • Instruction Set Architecture
  • Instructions
  • Pipelines
  • Simulations
  • Test And Evaluation

Fields of Study

  • Computer science

Readers

  • Parallel and Distributed Computing.
  • Systems Analysis and Design