A VME Based Associative Memory System.
Abstract
This thesis investigates the design and implementation of a VME based Content Addressable Memory (CAM) Peripheral Board System. This effort concentrated on implementing a prototype Reduced Instruction Set Computer (RISC) Board Controller and the design of the system architecture. This thesis presents the architecture of the system. In addition, several algorithms which are efficiently executed on this system are described. These algorithms have direct application in Artificial Intelligence (AI), database management, and pattern recognition. The final product designed is a 20 Mhz, general purpose peripheral board system which can be used on any VME system. A DMA capability allows a maximum transfer rate of 13.3 million 32-bit words per second. In a multiple board system, associative operations are performed in parallel between boards. The algorithms typically show a speedup of O(n) when evaluated against execution on SISD machines. Keywords: Associative Memory; Computer Architecture; Reduced Instruction Set Computer; Content Addressable Memory; Very Large Scale Integrated Circuits.
Document Details
- Document Type
- Technical Report
- Publication Date
- Dec 01, 1986
- Accession Number
- ADA177713
Entities
People
- Larry E. French
Organizations
- Air Force Institute of Technology