A Simulation Environment for Schema.
Abstract
In present day circuit design, many independent simulation tools are available for analyzing circuits at various levels of detail. This thesis presents a framework to tie these tools into the Simulation Environment in Schema, an integrated CAD system. The framework easily incorporates additional simulators, serves as a foundation upon which to build new analysis tools, and provides the ability for mixed-mode simulation. The Simulation Environment is composed of common data representations, a Generic Simulator, and a single user interface. A common representation for topological, model, and waveform data objects facilitates a uniform interface to the user and to all CAD tools. The Generic Simulator coordinates the flow of data objects between each simulator and the user or analysis tool.
Document Details
- Document Type
- Technical Report
- Publication Date
- Dec 01, 1986
- Accession Number
- ADA178404
Entities
People
- Margaret A. St. Pierre
Organizations
- Massachusetts Institute of Technology