Design of an Addressable Memory Controller.

Abstract

The main memory is an essential subsystem in a Von Neumann type of stored program machine. Because of the speed gap existence between the processor and the main memory, there has been a constant need to improve the main memory to achieve a better throughput. One method is to use a CAM (Content Addressable Memory). It is known as a very powerful facility for searching a particular item from a data array rather than from conventional memory. Investigated in this thesis are the discussion of CAM characteristics, timing analysis, CAM controller design and simulation results. The main results obtained in this thesis are timing characteristics of the CAM system and design considerations of the CAM controller.

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Document Details

Document Type
Technical Report
Publication Date
Mar 01, 1987
Accession Number
ADA181425

Entities

People

  • Byung W. Ham

Organizations

  • Naval Postgraduate School

Tags

Communities of Interest

  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Access Time
  • California
  • Cells
  • Classification
  • Computers
  • Content Addressable Memory
  • Decoders
  • Decoding
  • Electrical Engineering
  • Engineering
  • Memory Devices
  • Microprocessors
  • Schools
  • Security
  • Simulations
  • Standards
  • United States Naval Academy

Readers

  • Calculus or Mathematical Analysis
  • Computer Science/Computer Engineering/Data Science/Digital Signal Processing.
  • Electrical Engineering