Template-Set Approach to Defect Detection and Classification for VLSI Patterns,
Abstract
Automatic inspection of VLSI circuit patterns on photomasks and wafers is increasingly important as the minimum feature size decreases. Real-time inspection at the standard video rate is demanding because the volume of information in VLSI circuits patterns is enormously large. Similar to printed wiring board inspection, the goal of VLSI pattern inspection is not only to detect defects, but also to automatically interpret defects for patterning process analysis and control, which is essential to manufacturing automation. However, die to die or die to database comparison methods employed in most state-of-the-art VLSI pattern inspection systems have only defect detection capability. Simultaneous detection and classification of defects in real time has been challenging because of the complexity of computation required in statistical and syntactic classification methods. A new approach is based on template matching of local binary images with content-addressable memories (CAMs), which can easily be implemented in VLSI circuits because of its modularity and regularity. This approach was applied primarily to defect detection. Here its application is made to defect classification and its system implementation in VLSI circuits.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jan 01, 1986
- Accession Number
- ADA181571
Entities
People
- Chong-cheng Fu
- David H. Dameron
- James T. Walker
- Roger Fabian W. Pease
- Soo-ik Chae
Organizations
- Stanford University