Ships. High-Level Process Simulation for VLSI (Very Large Scale Integrated) Manufacturing,
Abstract
Very large scale integration fabrication is a complex set of operations set within a rapidly changing technology environment. It is subject to chance variations in process parameters, poor understanding and control of many parameters, and subtle interactions between them. At the same time, processing times and costs are increasing. The natural side-effect of these is that IC manufactures must require more evidence that the predicted and actual process characteristics will be within a tight tolerance. The prevailing means to verify process performance is through simulation. Unfortunately, while traditional process simulation tools such as SUPREM III have become pervasive in the IC industry as design aides for process development, they are not suited to the problems of manufacturing-level process simulation. What is required is a high-level process simulation tool that can introduce abstractions that reduce complexity and algorithms that reduce simulation costs. We have built such a tool called SHIPS, which stands for Stanford High-Level Incremental Process Simulator. The SHIPS tool provides a high-level process description language, a structured user-interface, and a new simulation algorithm for reducing the number of modules that must be simulated in analyzing the manufacturability of a process.
Document Details
- Document Type
- Technical Report
- Publication Date
- Feb 28, 1987
- Accession Number
- ADA182356
Entities
People
- Krishna C. Saraswat
- Steven D. Leeke