Computer Modeling of Complete IC Fabrication Process.
Abstract
The focus of this research effort is the development of fundamental algorithms for process and device modeling as well as novel integration of the tools for advanced IC technology design. The development of the first complete 2D process simulator, SUPREM 4, is reported. The algorithms are discussed as well as application to local-oxidation and extrinsic diffusion conditions occur in Cmos AND BiCMOS technologies. The evolution of 1D (SEDAN) and 2D (PISCES) device analysis is discussed. The application of SEDAN to a variety of non-silicon technologies (GaAs and HgCdTe) are considered. A new multi-window analysis capability for PISCES which exploits Monte Carlo analysis of hot carriers has been demonstrated and used to characterize a variety of silicon MOSFET and GaAs MESFET effects. A parallel computer implementation of PISCES has been achieved using a Hypercube architecture. The PISCES program has been used for a range of important device studies including: latchup, analog switch analysis, MOSFEt capacitance studies and bipolar transient device for ECL gates. The program is broadly applicable to RAM and BiCMOS technology analysis and design. In the analog switch technology area this research effort has produced a variety of important modeling and advances.
Document Details
- Document Type
- Technical Report
- Publication Date
- May 28, 1987
- Accession Number
- ADA184807
Entities
People
- Robert W. Dutton
Organizations
- Stanford University