ARTIST: A Silicon Assembler for Mesh Arrays.

Abstract

This paper describes a VLSI layout assembler, ARTIST, under development at Penn State. ARTIST performs transistor placement and interconnection within a module. Novel ideas used in the design of the assembler are described. A modular software design is used so that we can easily try different approximation algorithms for transistor placement. A comparison between simulated annealing and a totally random approach is presented. Surprisingly, the random approach is better for realistic running times. Finally, a hybrid approximation algorithms for transistor placement is described and is shown to be better than either of the other two algorithms. (Author)

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Document Details

Document Type
Technical Report
Publication Date
Nov 01, 1986
Accession Number
ADA184861

Entities

People

  • Chiou S. Fuh
  • Kong-yee Pun
  • Robert M. Owens

Organizations

  • Pennsylvania State University

Tags

Communities of Interest

  • Advanced Electronics
  • C4I
  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Acquisition
  • Algorithms
  • Annealing
  • Circuits
  • Computer Science
  • Contracts
  • Field Effect Transistors
  • Geometry
  • Language
  • Military Research
  • Pennsylvania
  • Quadrants
  • Simulations
  • Simulators
  • Standards
  • Transistors
  • Universities

Fields of Study

  • Engineering

Readers

  • Adaptive Control and Estimation with Uncertainty in Dynamic Systems.
  • Computational Modeling and Simulation
  • Semiconductor Device Technology