Short Pseudorandom Test Sequences.

Abstract

This paper presents a probabilistic model for pseudorandom testing of combinational circuits and shows how the general model can be simplified for short test sequences. Pseudorandom test pattern generation uses an autonomous linear feedback shift register, ALFSR, as a source of test vectors. These test vectors can be, and are, used to test both combinational and sequential networks. Only combinational circuit testing is considered here. This discussion applies mainly to on-line testing in which the test patterns are generated during the test procedure rather than being stored copies of previously generated patterns. The difference is that all of the first L vectors in the sequence must be used rather than selected patterns. The patterns may be generated by circuits or by a program simulating an ALFSR. The major current issues for pseudorandom test pattern generation are: selecting the test length, determining the fault coverage, and identifying 'random-pattern resistant' faults (faults that are hard-to-detect with random patterns). These could, in principle, all be accomplished by a full single-stuck fault simulation of the network to be tested.

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Document Details

Document Type
Technical Report
Publication Date
Feb 01, 1987
Accession Number
ADA185883

Entities

People

  • E. J. Mccluskey
  • K. D. Wagner

Organizations

  • Stanford University

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DTIC Thesaurus Topics

  • Abstracts
  • Circuits
  • Classification
  • Computer Science
  • Computers
  • Contracts
  • Copyrights
  • Demographic Cohorts
  • Electrical Engineering
  • Information Theory
  • Networks
  • Probabilistic Models
  • Probability
  • Security
  • Shift Registers
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Fields of Study

  • Computer science
  • Engineering

Readers

  • Aerospace Test and Evaluation
  • Computer Programming and Software Development.

Technology Areas

  • AI & ML
  • AI & ML - Bayesian Inference
  • AI & ML - Neural Networks