Latent Failures and Coverage in Fault-Tolerant Systems. A VLSI CMOS Circuit Design Technique to Aid Test Generation.

Abstract

Contents: Latent Failures and Coverage in Fault-Tolerant Systems; and A VLSI CMOS Circuit Design Technique to Aid Test Generation.

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Document Details

Document Type
Technical Report
Publication Date
Dec 01, 1986
Accession Number
ADA187615

Entities

People

  • Edward J. Mccluskey
  • Hassanein H. Amer

Organizations

  • Stanford University

Tags

Communities of Interest

  • Autonomy
  • Energy and Power Technologies
  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Circuits
  • Computer Science
  • Computer-Aided Design
  • Computers
  • Detection
  • Detectors
  • Determinants (Mathematics)
  • Electrical Engineering
  • Failure Mode And Effect Analysis
  • Logic
  • Logic Gates
  • Markov Models
  • Nand Gates
  • Networks
  • Probability
  • Simulations
  • Transitions

Readers

  • Aviation Safety Risk Assessment.
  • Integrated Circuit Design and Technology.
  • Library and Information Science