Rapid Prototyping of Application Specific Processors.
Abstract
This thesis defines a methodology for rapid prototyping custom VLSI processor. The rapid prototyping methodology is based upon the specification of a general purpose architecture customized via microcode to solve unique applications. Since processing requirements will vary, the designer chooses appropriate macrocells from a design library to provide the best hardware support. A high-level language description of the problem is then translated into microcode. The microcode is automatically assembled and designed into a ROM (read-only memory), resulting in a processor customized to solve the given application. By allowing the designer to quickly convert ideas into implementations, the rapid prototyping methodology frees the designer to be creative rather than becoming mired in implementation details. A general purpose VLSI architecture was designed to support the rapid prototyping methodology. The control section of the architecture centers on the micromode ROM (read-only memory) and a microcode sequencer, which provides proper addressing to the ROM. The datapath section (I/O path, registers, and arithmetic hardware) uses the control signals from the ROM to perform the required processing. The datapath macrocells were designed in a bit slice fashion, allowing easy configuration to different data types and widths.
Document Details
- Document Type
- Technical Report
- Publication Date
- Dec 01, 1987
- Accession Number
- ADA189541
Entities
People
- M. Gallagher
Organizations
- Air Force Institute of Technology