SLAPP: A Special Multiprocessor Array for Signal Processing and Linear Algebra.

Abstract

The key to meeting the extremely high throughput requirements of future military signal and image processing systems is parallelism in algorithms and hardware. This paper will describe the implementation of a core set of algorithms on one possible hardware implementation, designed to achieve high speed and efficient parallelism. This approach and design procedure, while using currently available integrated circuit building blocks, is similar to how this type of processor will be developed in the future using VLSI. Keywords: Systolic array, RAM, Algorithms, and Boundary processors.

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Document Details

Document Type
Technical Report
Publication Date
Dec 01, 1987
Accession Number
ADA191587

Entities

People

  • Barry Drake
  • J. J. Symanski
  • John Celto
  • Judy Shirasago
  • Tom Henderson

Tags

Communities of Interest

  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Algorithms
  • Arithmetic Units
  • Boundaries
  • Circuits
  • Computations
  • Computer Programming
  • Equations
  • High Level Languages
  • High Resolution
  • Language
  • Linear Algebra
  • Microcode
  • Military Research
  • Parallel Computing
  • Parallel Processing
  • Signal Processing
  • Simulations

Fields of Study

  • Engineering

Readers

  • Parallel and Distributed Computing.