A Transparent Coprocessor for Interprocessor Communication in an MIMD Computer.

Abstract

This paper presents the design of a high performance interprocessor communication coprocessor for non-shared memory MIMD architectures. The design provides efficient interprocessor communication by relieving the computational processor of all communication related activities and by minimizing the overhead of packet assembly and disassembly. A multiprocessing scheme with zero process switch time allows this coprocessor to handle many communication ports with no additional overhead. Logical ports, which allow many computational processes to share the same physical port, are handled automatically by the coprocessor. Keywords: Parallel processing, Communication, Coprocessor, Message passing, Communication delay.

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Document Details

Document Type
Technical Report
Publication Date
Jan 01, 1987
Accession Number
ADA193299

Entities

People

  • Lawrence H Snyder
  • Thomas J. Holman

Organizations

  • University of Washington

Tags

Communities of Interest

  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Algorithms
  • Bandwidth
  • Communication Channels
  • Computational Processes
  • Computations
  • Computer Science
  • Computers
  • Computing System Architectures
  • Data Transmission
  • Detection
  • Error Correction Codes
  • Error Detection Codes
  • Errors
  • Local Area Networks
  • Military Research
  • Parallel Computing
  • Parallel Processing

Fields of Study

  • Computer science
  • Engineering

Readers

  • Parallel and Distributed Computing.