Systolic Array Fault Tolerance Performance Analysis.

Abstract

The reliability performance of six different systolic array fault tolerance techniques are determined and compared in terms of mean time between failure (MTBF). The six techniques include redundant arrays, companion processors, sequential row elimination (SRE), alternate row and column elimination (ARCE), virtual arrays, and tree based architectures. The results demonstrate the importance of the switching function failure rate in achieving theoretical capability. Virtual arrays were found to have the best theoretical potential for improving the reliability of systolic arrays when high throughput is required. All techniques provided comparable performance for low throughput levels. The potential application of graceful degradation techniques to the minimum variance distortionless response (MVDR) adaptive beamforming algorithm is discussed. Keywords: Adaptive beamforming; Fault tolerance; Reconfigurable architectures; Reliability; Systolic Arrays.

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Document Details

Document Type
Technical Report
Publication Date
Apr 05, 1988
Accession Number
ADA193521

Entities

People

  • M. H. Leonhardt
  • T. C. Choinski

Organizations

  • Naval Underwater Systems Center

Tags

Communities of Interest

  • Ground and Sea Platforms

DTIC Thesaurus Topics

  • Algorithms
  • Computer Science
  • Costs
  • Detection
  • Engineering
  • Fault Tolerance
  • Hydrophones
  • Naval Warfare
  • Numbers
  • Probability
  • Random Variables
  • Reliability
  • Reliability Engineering
  • Security
  • Signal Processing
  • Stochastic Processes
  • Very Large Scale Integration

Fields of Study

  • Engineering

Readers

  • Applied Combinatorial Optimization and Logic Circuit Design.
  • Phased Array Antenna Design.
  • Software Engineering.