A Notation for Describing Multiple Views of VLSI Circuits
Abstract
A declarative hierarchical notation is introduced that allows the parametric representation of entire families of VLSI circuits. Layout, schematic diagrams and network structure are all accommodated by the nation in a way that emphasizes common elements. The notation is the basis of a structured environment for developing design generators as well as capturing design expertise.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 01, 1988
- Accession Number
- ADA197204
Entities
People
- Jean-loup Baer
- Larry Mcmurchie
- Lawrence H Snyder
- Meei-chiueh Liem
- Rudolf Nottrott
Organizations
- University of Washington