Simulating Synchronous Processors

Abstract

This paper shows how a distributed system with synchronous processors and asynchronous message delays can be simulated by a system with both asynchronous processors and asynchronous message delays in the presence of various types of processor faults. Consequently, the result of Fischer, Lynch and Paterson (1985), that no consensus protocol for asynchronous processors and communication can tolerate one failstop fault, implies a result of Dolev, Dwork and Stockmeyer (1987), that no concensus protocol for synchronous processors and asynchronous communication can tolerate one failstop fault. Keywords: Fault tolerance, Simulation.

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Document Details

Document Type
Technical Report
Publication Date
Jun 01, 1988
Accession Number
ADA197410

Entities

People

  • Jennifer L. Welch

Organizations

  • Massachusetts Institute of Technology

Tags

Communities of Interest

  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Algorithms
  • Classification
  • Communication Systems
  • Computer Science
  • Computers
  • Computing Devices
  • Construction
  • Contracts
  • Distributed Computing
  • Fault Tolerance
  • Massachusetts
  • Message Systems
  • Military Research
  • Security
  • Sequences
  • Simulations
  • Transitions

Fields of Study

  • Engineering

Readers

  • Applied Combinatorial Optimization and Logic Circuit Design.
  • Parallel and Distributed Computing.