Parallel Processing Techniques for the Simulation of MOS VLSI Circuits Using Waveform Relaxation

Abstract

Waveform relaxation algorithms for the simulation of MOS circuits exhibit natural parallelism, arising from the intrinsic partitioning of the circuit into subcircuits which are solved separately during the iterative solution process. Investigated in this thesis is the extent to which the overall run time of a simulation can be reduced by utilizing the natural parallelism of waveform relaxation on parallel processors. Keywords: Parallel processing, Circuit simulation, Waveform relaxation, VLSI(Very Large Scab Integrated Circuits), Computerized simulation, Parallel processors, Algorithms.

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Document Details

Document Type
Technical Report
Publication Date
Jul 01, 1988
Accession Number
ADA197879

Entities

People

  • David W. Smart

Organizations

  • University of Illinois Urbana–Champaign

Tags

Communities of Interest

  • Ground and Sea Platforms

DTIC Thesaurus Topics

  • Algorithms
  • Central Processing Units
  • Computational Science
  • Computations
  • Computer Programs
  • Computer-Aided Design
  • Computers
  • Differential Equations
  • Digital Circuits
  • Electrical Engineering
  • Operating Systems
  • Parallel Computing
  • Parallel Processing
  • Parallel Processors
  • Semiconductors
  • Simulations
  • Simulators

Fields of Study

  • Engineering

Readers

  • Computer Vision.
  • Microwave Engineering.
  • Parallel and Distributed Computing.