Correlation of Atomic Roughness and Electronic Properties at the Si/ SiO2- Interface
Abstract
Investigation of steps and other defects at the Si/SiO2 interface by spot profile analysis of LEED. Development of improved defect analysis by use of high resolution LEED systems. Search for correlations of defects with electronic properties of MOS-devices by measurement of defects and electrical properties on the same wafers. The development of the evaluation procedure makes use of a high precision measurement at many different energies: since the spot profile can be separated in a central spike, two Lorentzian type shoulders and a constant background (which is not of interest here), the fraction of the contributions yields valuable informations: The central spike provides the vertical distribution (number of surface levels, distribution over the layers) the shoulders are used to derive the lateral width distribution of terraces and defect areas separately. Keywords: Interface, Defects, MOS devices, Atomic steps, Interface electrical breakdown, Correlation of defects, Electric properties, Silicon, Silicon dioxide.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 01, 1988
- Accession Number
- ADA198468
Entities
People
- M. Henzler
Organizations
- Leibniz University Hannover