Accelerating Relaxation Algorithms for Circuit Simulation Using Waveform-Newton and Step-Size Refinement

Abstract

A new relaxation algorithm for circuit simulation that combines the advantages of iterated timing analysis (ITA) and waveform-relaxation (WR) is described. The method is based on using an iterative step-size refinement strategy with a waveform-relaxation-Newton (WRN) algorithm. All three relaxation techniques, ITA, WR, and WRN, are compared and experimental results that indicate the strengths and weaknesses of the methods are presented. In addition, a new covergence proof for the waveform-Newton method for systems with nonlinear capacitors is provided. Finally, it is shown that the step-refined WRN algorithm can be implemented on a parallel processor in such a way that not only can different subsystems be processed in parallel but in addition, the solution at different timepoints of the same subsystem can be computed in parallel.

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Document Details

Document Type
Technical Report
Publication Date
Oct 01, 1988
Accession Number
ADA200774

Entities

People

  • A. L. Sangiovanni-vincentelli
  • A. R. Newton
  • J. K. White
  • R. A. Saleh

Organizations

  • Massachusetts Institute of Technology

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Algorithms
  • Circuit Analysis
  • Circuits
  • Computational Science
  • Computations
  • Computer Science
  • Computer-Aided Design
  • Computers
  • Differential Equations
  • Digital Circuits
  • Electrical Engineering
  • Electronic Circuits
  • Equations
  • Linear Differential Equations
  • Linear Systems
  • Numerical Integration
  • Waveforms

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