Combining Z-buffer Engines for Higher-Speed Rendering

Abstract

Described is a hardware architecture for combining the outputs of a number of z-buffer rendering engines to achieve higher performance than is possible with a single renderer. It allows a combination of renderers to achieve the same price/performance ratio as the individual renderers that compose it, and can be extended to create systems with arbitrarily high performance. The described architecture is based on a fusion of scan-line rendering and the conventional z-buffer algorithm. The frame buffers of several z-buffer engines are modified to scan out z-values as well as color values. Multiplexing devices combine the z/color streams from each pair of frame-buffers. These z/color streams are then combined by further multiplexers, creating a binary tree that funnels the z/color information from the many conventional frame buffers into a single z/color stream. The color stream is then used to drive a standard display device. The proposed architecture allows rendering rates of millions and even tens of millions of polygons per second. The basic architecture can be extended with additional hardware to perform antialiasing and texture-mapping. Computer graphics.

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Document Details

Document Type
Technical Report
Publication Date
Jan 01, 1988
Accession Number
ADA201137

Entities

People

  • Steven Molnar

Organizations

  • University of North Carolina at Chapel Hill

Tags

Communities of Interest

  • Advanced Electronics
  • Air Platforms
  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Algorithms
  • Comparators
  • Composite Images
  • Composite Materials
  • Computations
  • Computer Graphics
  • Computer Science
  • Computers
  • Conversion
  • Cost Effectiveness
  • Costs
  • Display Systems
  • Graphics
  • Hierarchies
  • Polygons
  • Three Dimensional
  • Triangles

Fields of Study

  • Computer science

Readers

  • Computer Vision.
  • Parallel and Distributed Computing.