Semiannual Technical Report Number 1, VLSI Architectures and CAD
Abstract
Current research in the LIS is focused in several different areas. In the area of circuit specification is the development of Wirelisp - a dialect of lisp that facilitates the specification of circuit structure. A graphical frontend for Wirelisp allows the mixing of symbols representing circuit elements and lisp expressions. Another area of continuing interest is the parallelism of CMOS circuits and the implications this parallelism has for stimulation. The work has taken two forms. First, empirical studies have continued to provide insight into the potential parallelism of circuits, and to explain why designers feel that their circuits are more parallel than earlier measurements show. Secondly, we have begun to formally model different simulation strategies so that a comparison of the strategies can be made independent of the simulation implementation. Current research is also being applied to the area of behavioral synthesis. A single representation is being sought that will describe both internal behavior (data-flow and operations) and interface behavior (signaling conventions and their timing constraints). A new unified behavior graph is being proposed that is concise and allows straightforward mapping to hardware. During the last six months several major design tools have been completed. They are being used extensively within the LIS and recently have been offered to the research community through the LIS distribution of VLSI design tools.
Document Details
- Document Type
- Technical Report
- Publication Date
- Nov 01, 1988
- Accession Number
- ADA203233
Entities
Organizations
- University of Washington