General Compiled Electrical Simulation

Abstract

This report describes the initial results of our research into General Compiled electrical simulation. We use advanced complier techniques to speed up electrical level simulation such as the type performed by SPICE. Our system creates a simulation program by complying together a simulator and the circuit to be simulated. Our approach results not only in substantial speedups, but also in simpler simulators. An added benefit is that simulation programs can be paralyzed much more effectively than a simulator can be paralyzed.

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Document Details

Document Type
Technical Report
Publication Date
Jan 01, 1987
Accession Number
ADA207223

Entities

People

  • Daniel Weise
  • Scott Seligman

Organizations

  • Stanford University

Tags

Communities of Interest

  • Energy and Power Technologies
  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Algorithms
  • Arithmetic
  • Automation
  • California
  • Circuits
  • Compilers
  • Computations
  • Computer Programming
  • Computer Programs
  • Computer Science
  • Computers
  • Machine Languages
  • Parallel Processors
  • Rlc Circuits
  • Semiconductors
  • Simulations
  • Simulators

Fields of Study

  • Computer science

Readers

  • Parallel and Distributed Computing.
  • Software Engineering
  • Systems Analysis and Design