Technical Progress Report Number 2, 1 November-30 November 1988
Abstract
This project on subpixel target detection relates to research in the optimization of three dimensional computing structures for use in target detection and to research in the reduction of an optimum computing to an efficiently-designed silicon chip. During this work period the project concentrated on working with our subcontractor Visual Information Technologies (Plano, Texas) on a computing structure which assumes a 16-bit data bus delivering values of 16 voxels to 7 replicate memories each holding 128K bits. Since reduction of this computing structure to silicon is beyond the current state-of-the-art, another design was prepared using a one-byte input via an input data multiplexor with input data stored sequentially in 7 replicate memories. Data is extracted from these memories via a hard-wired routing matrix to a single flash processor. This new configuration has overwhelming advantages in terms of our ability to reduce it to silicon. Keywords: Signal processing, Infrared detection.
Document Details
- Document Type
- Technical Report
- Publication Date
- Dec 15, 1988
- Accession Number
- ADA208285
Entities
People
- Kendall Preston Jr.