Design of an Expandable Digital Signal Processor (DSP) Based on the TMS320C25
Abstract
Our expandable digital signal processor (DSP) is designed to suit a wide variety of signal processing tasks. It has good flexibility in implementing software because of its unique combination of features. Each DSP has 32K words of program and data EEPROM (electrically erasable and programmable read-only memory),16K words of program random-access memory (RAM), and 64K words of data RAM. With the capability of remapping external memory by use of software, each microprocessor is capable of running at 10 million instructions per second (MIPS). When more processing power is needed, additional basic DSP units can be added that are capable of communicating with each other through 1K words of global RAM. In addition, each unit of the DSP has software-controlled analog I/O circuitry with A/D and D/A conversion rates that can be set independently from 1 to 20 kHz.
Document Details
- Document Type
- Technical Report
- Publication Date
- Aug 09, 1989
- Accession Number
- ADA211343
Entities
People
- T. M. Moran
Organizations
- United States Naval Research Laboratory