Parallelism in the Discrete-Event Simulation Algorithm
Abstract
With the increasing complexity of very large scale integrate circuits, simulation on a digital computer system has become a primary means of low-cost testing of new designs. However, a detailed behavioral simulation can be highly expensive in terms of computation loads. Simulation time can be reduced by distributing the problem over several processors. Indeed, the availability of commercial multiprocessors gives a new importance to parallel and distributed simulation. This report surveys the techniques that have been proposed to deal with this problem and then presents a new scheme based on a consistent description of the system to be simulated, which allows a maximum exploitation of the parallelism inherent in the system.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jul 01, 1989
- Accession Number
- ADA213060
Entities
People
- Jean-luc Gaudiot
- Jean-luc Jezouin
- Walid Najjar
Organizations
- University of Southern California