A Fault-Tolerant Software Algorithm for a Network of Transputers

Abstract

This thesis presents a software algorithm that resends work packages to processors when one or more of the worker processors fails or when the link with one or more processors fails. There are two resend criteria used in this algorithm: resend at end of initial assignment and resend at time out. The work, divided into several packages in order to run on several processors in parallel, will be completed as long as at least one worker processor remains working and communicating with the main processor. This algorithm could add some fault- tolerance to computer processing equipment in embedded systems. Keywords: Multiprocessors; High level language; Parallel C language; Parallel Fortran C language; Ada; OCCAM language.

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Document Details

Document Type
Technical Report
Publication Date
Jun 01, 1989
Accession Number
ADA213092

Entities

People

  • William F. Benage Jr.

Organizations

  • Naval Postgraduate School

Tags

Communities of Interest

  • C4I
  • Energy and Power Technologies
  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Algorithms
  • Computer Programming
  • Computer Programs
  • Computer Science
  • Computers
  • Corporations
  • Embedded Systems
  • Fault Tolerance
  • High Level Languages
  • Language
  • Operating Systems
  • Processing Equipment
  • Programming Languages
  • Test And Evaluation
  • United Kingdom
  • United States
  • United States Government

Fields of Study

  • Computer science
  • Engineering

Readers

  • Parallel and Distributed Computing.