Investigation of an Advanced Fault Tolerant Integrated Avionics System
Abstract
This report presents an advanced, fault tolerant multiprocessor avionics architecture as could be employed in an advanced rotorcraft such as LHX. The processor structure is designed to interface with existing digital avionics systems and concepts including the Army digital Avionics System (ADAS) cockpit/display system, navaid and communications suites, integrated sensing suite, and the Advanced Digital Optical Control system (ADOCS). The report defines mission, maintenance and safety-of-flight reliability goals as might be expected for an operational LHX aircraft. Based on use of a modular, compact (16-bit) microprocessor card family, results of a preliminary study examining simplex, dual and standby-sparing architectures is presented. Given the stated constraint, it is shown that the dual architecture is best suited to meet reliability goals with minimum hardware and software overhead. The report presents hardware and software design considerations for realizing the architecture including redundancy management requirements and techniques as well as verification and validation needs and methods. Keywords: Computer architectures. (sdw)
Document Details
- Document Type
- Technical Report
- Publication Date
- Mar 01, 1986
- Accession Number
- ADA213123
Entities
People
- D. Cottrell
- W. R. Dunn
Organizations
- Colorado State University Pueblo