A Distributed Kernel for Simulation of the VHSIC Hardware Description Language
Abstract
This thesis develops a technique for simulating large-scale circuit models, written in the Very High Speed Integrated circuit Hardware Description Language (VHDL), on a distributed computer composed of many individual processing units. The distributed system consists of a scalable kernel which can support a large simulation composed of many concurrent VHDL processes. The kernel provides model-independent support functions that handle signal propagation and process activation in a distributed environment. The synchronization between individual logical processes in the kernel is handled using the Chandy-Misra null message algorithm. The distributed kernel has been implemented using the Spectrum distributed simulation testbed and runs on the eight-processor Intel iPSC/2 Hypercube at AFIT. Several test circuits have been simulated, including ripple-carry and carry look-ahead adders, and a counter. These cases cover combinational and sequential logic. (rrh)
Document Details
- Document Type
- Technical Report
- Publication Date
- Dec 01, 1989
- Accession Number
- ADA215419
Entities
People
- Michael C. Proicou
Organizations
- Air Force Institute of Technology