A Study of Caching in Capability Computers
Abstract
This report describes an investigation into the use of cache memories in capability architectures. A theory to describe the relationship between the size of cache and its efficiency is proposed. The use of a simulator to test the theory and compare various cache management policies is described, and the results obtained are discussed. Conclusions are drawn as to the best caching strategy for the SMITE capability computer. A cache consists of a block of high- speed memory, much faster than that of the main store, in which the data that is most likely to be used again (known as active data) is stored. After the initial access to main store for the required location, further references access the cache. As a result, over a period of several references, the total referencing time for that location is reduced. The SMITE computer is a capability computer based on the Flex architecture in which procedures and abstract data types are used for security. Capability computers treat memory as a heap and this leads to a different pattern of usage compared to conventional architectures. Hence it is of particular interest to compare the effects of a cache on such systems. Only single processor systems are considered with either single or discrete caches. Great Britain.
Document Details
- Document Type
- Technical Report
- Publication Date
- Sep 01, 1989
- Accession Number
- ADA217157
Entities
People
- J. G. Haines
Organizations
- Royal Signals and Radar Establishment