Statistical Design of MOS VLSI (Very Large Scale Integrated) Circuits with Designed Experiments

Abstract

A new approach for the statistical design and analysis of Metal Oxide Semiconductor is introduced. The proposed approach approximates the circuit performances, such as gain and delay, by fitted models. The fitted models are then used as surrogates of the circuit simulator to predict and optimize the parametric yield with computation efficiency and to achieve off-line quality control. The use of statistical design and analysis of experiments for model construction have been investigated theoretically and experimentally, and different methods to assess the adequacy of a fitted performance model have been studied.

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Document Details

Document Type
Technical Report
Publication Date
Mar 01, 1990
Accession Number
ADA219654

Entities

People

  • Tat-kwan E. Yu

Organizations

  • University of Illinois Urbana–Champaign

Tags

Communities of Interest

  • Advanced Electronics
  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Circuit Analysis
  • Circuits
  • Complementary Metal-Oxide Semiconductors
  • Computational Science
  • Computer Simulations
  • Data Science
  • Engineering
  • Experimental Design
  • Information Science
  • Integrated Circuits
  • Metal Oxide Semiconductors
  • Monte Carlo Method
  • Quality Control
  • Semiconductors
  • Simulations
  • Simulators
  • Statistical Analysis

Fields of Study

  • Physics

Readers

  • Computational Modeling and Simulation
  • Integrated Circuit Design and Technology.

Technology Areas

  • Microelectronics