Test Diagnostics of RF Effects in Integrated Circuits

Abstract

This report presents the results of an effort to measure the RF upset susceptibilities of CMOS and low power Schottky integrated circuits and to demonstrate a test probe methodology for measuring RF noise coupling, generation, and propagation into and upon these integrated circuits chips. RF interference used was continuous wave CW from 1MHz to 200MHz. This was combined with the digital signal using an op-amp combiner and directly coupled into the device ports. Upset threshold voltage levels were measured, complex input impedances were measured, and upset power levels were calculated and plotted. A scanning electron microscope (SEM), quantitative voltage contrast (QVC) system was used to measure internal waveforms along the intended signal path, on adjacent metals runs, and an internal power and ground connections. Keywords: Complementary metal oxide semiconductors; Electromagnetic interference. Voltage contrast; Susceptibility; Continuous wave.

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Document Details

Document Type
Technical Report
Publication Date
Feb 01, 1990
Accession Number
ADA219737

Entities

People

  • Christine L. Proffitt
  • David D. Wilson
  • Mark G. Rossi
  • Stan Epshtein

Organizations

  • Martin Marietta

Tags

Communities of Interest

  • Advanced Electronics
  • Sensors

DTIC Thesaurus Topics

  • Circuit Analysis
  • Circuit Testers
  • Clocks
  • Detectors
  • Electron Microscopes
  • Integrated Circuits
  • Logic Gates
  • Measurement
  • Metal Oxide Semiconductors
  • Microscopes
  • Radio Frequency
  • Radio Frequency Interference
  • Reliability
  • Scanning Electron Microscopes
  • Semiconductor Devices
  • Semiconductors
  • Test And Evaluation

Fields of Study

  • Physics

Readers

  • Electromagnetic Wave Scattering and Antenna Radiation Engineering
  • Electronics Engineering
  • Nanoscale Plasmonic Nanotechnology

Technology Areas

  • Microelectronics