VLSI Architectures and CAD
Abstract
Contents: Overview of Activities; A Unified Behavioral/Structural Representation for Simulation and Synthesis; A Circuit Specification Language that Combines Graphics and Procedures; Timing Optimization of Multi-phase Logic; Comparing Synchronization Strategies for Parallel Logic-Level Simulation; A hybrid Compiled/Interpreted Approach to Switch-Level Simulation; Normalized Time and its Use in Architectural Design; Work on a Low-cost Programmable Chip Tester; Hardware Assist for Performance Evaluation of Multi-Processors; Hardware-Based Data Compression; Reconfigurable Logic Arrays; Testing of Asynchronous Circuits.
Document Details
- Document Type
- Technical Report
- Publication Date
- Nov 01, 1989
- Accession Number
- ADA220736
Entities
People
- Lawrence H Snyder
Organizations
- University of Washington