On the Design and Analysis of Multiple-Storage Elements
Abstract
The primary contribution of this thesis is the development of a data storage latch that accepts, stores and provides four-valued logic signals. The latch is implemented in Complementary Metal Oxide Silicon and all logic levels are encoded as voltage. The latch storage state is determined by thresholding operations on its input, and the output is logically restored replica of that (multiple-valued) input. Detailed analysis of an existing current-mode CMOS design is also presented in this study. A comparison between these devices reveals that the voltage-mode data latch provides less stable intermediate logic states, but consumes significantly less static power. In addition, the voltage- mode CMOS design can be implemented with the same number of devices that are required for two binary D flip-flops. Keywords: Logic circuits.
Document Details
- Document Type
- Technical Report
- Publication Date
- Dec 01, 1989
- Accession Number
- ADA223095
Entities
People
- David A. York
Organizations
- Naval Postgraduate School