Fault Tolerant Design for Multistage Routing Networks

Abstract

As the size of digital systems increases, the average length of time between single component failures diminishes. To avoid component related failures, large computers must be fault-tolerant; that is, the computer must perform correctly even when some components fail. This paper concentrates on providing fault-tolerance in the interconnection network for massively parallel MIMD computers. Particularly, the focus is on methods for achieving a high degree of fault-tolerance in multistage routing networks. A multipath scheme is described for providing end-to-end fault-tolerance on large networks. The scheme improves routing performance while keeping network latency low. The novel routing component RN1 is described which implements this scheme, showing how it can be the basic building block for fault-tolerant multistage routing networks. (rh)

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Document Details

Document Type
Technical Report
Publication Date
Apr 01, 1990
Accession Number
ADA224267

Entities

People

  • AndrĂ© DeHon
  • Henry Minsky
  • Tom Knight

Organizations

  • Massachusetts Institute of Technology

Tags

DTIC Thesaurus Topics

  • Artificial Intelligence
  • Bandwidth
  • Computer Science
  • Computers
  • Data Transmission
  • Digital Communications
  • Equations
  • Fault Tolerance
  • High Level Language Architecture
  • Network Science
  • Packet Switching
  • Parallel Computing
  • Parallel Processing
  • Standards
  • Switches
  • Switching
  • Theoretical Computer Science

Fields of Study

  • Computer science

Readers

  • Applied Combinatorial Optimization and Logic Circuit Design.
  • Computer Networking
  • Parallel and Distributed Computing.