Systolic Signal Processor/High Frequency Direction Finding
Abstract
This report documents the feasibility of hosting computationally intensive signal processing algorithms on a systolic array architecture. The practicality of such hosting is demonstrated through use of the High Speed Systolic Array Processor (HiSSAP) testbed and a high frequency direction finding algorithm. Systolic architectures provide a viable alternative to using traditional computer hosts for signal processing application requiring massive quantities of matrix-based computational throughput. The systolic implementations of a four-channel finite impulse responses (FIR) filter and multiple signal classification (MUSIC) direction of arrival estimator yielded results consistent with theoretical models. The tests conducted on the HiSSAP testbed demonstrated the feasibility of experimental data produced by both an analytical model and an antenna simulator within a controlled laboratory signal environment. The scope of this investigation should be expanded to include processing of actual off-the-air high frequency radio signals. This advanced level of testing can more realistically estimate the essential design specifications for a proper systolic host for adaptive signal processing algorithms. (KR)
Document Details
- Document Type
- Technical Report
- Publication Date
- Oct 01, 1990
- Accession Number
- ADA229706
Entities
People
- F. M. Tirpak Jr
- J. P. Loughlin