Recognition of VLSI Module Isomorphism

Abstract

The purpose of this study is to determine whether or not a program could be developed to examine isomorphism between parts of a VLSI layout. Many simulation files, obtained through Magic's hierarchical extractor, were analyzed in order to develop a C program to accomplish recognition in several types of gates. This recognition gives signatures in order to check for isomorphism. The development and design of the algorithms used in different parts of the program are described. Results demonstrate that recognition of elements in a CMOS circuit is possible, even with moderate complexity structures. An appendix with the C program listings is included.

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Document Details

Document Type
Technical Report
Publication Date
Mar 01, 1990
Accession Number
ADA230298

Entities

People

  • Emmanouil N. Zagourakis

Organizations

  • Naval Postgraduate School

Tags

Communities of Interest

  • Advanced Electronics

DTIC Thesaurus Topics

  • Abstracts
  • Algorithms
  • Classification
  • Computer-Aided Design
  • Electrical Engineering
  • Engineering
  • Graph Theory
  • Identification
  • Length
  • Lists (Data Structures)
  • Nand Gates
  • Recognition
  • Schools
  • Security
  • Simulations
  • Transistors
  • Very Large Scale Integration

Readers

  • Computer Science.
  • Computer Vision.
  • Integrated Circuit Design and Technology.