Design and Fabrication of an Implantable Cortical Semiconductor Integrated Circuit Electrode Array
Abstract
This research furthered the processing steps of the AFIT 16 by 16 implantable cortical semiconductor integrated circuit electrode array, or brain chip. The areas of interest include the brain chip electron ics, metallization, ionic permeation, and implantation. The electronics and metallization are heavily covered. A high speed, single clock divide-by-two circuit was modified with a reset transistor and cascaded to form a ripple counter. This device had stable operation at specific source voltage and clock voltage and frequency. A 7-stage inverter with 10 unmodified divide-by-two circuits cascaded operated between 1.7 and 8 volts, and between 39 Khz and 1 Mhz, respectively. The metallization process refers to coating Au/Ni or Pt onto exposed aluminum areas (pads) of a CMOS integrated circuit. Sputtering was used to coat the chip. And an Au/Ni etchant or Pt peel-off technique was used. The Au/Ni etchant used was iodine, potassium iodide, and deionized water solution. Theses. (RH)
Document Details
- Document Type
- Technical Report
- Publication Date
- Dec 01, 1990
- Accession Number
- ADA230676
Entities
People
- Pierre K. Lefevre
Organizations
- Air Force Institute of Technology