Buried Silicide Interconnections with Bonded Wafers
Abstract
Complex monolithic integrated circuits are increasingly limited by the needs of device interconnections. Existing materials take up valuable real estate on the die, limit current and are subject to parasitic capacitances. The use of multilevel and 3D structures has been suggested in order to avoid some of these problems. Formation of conductors by ion implantation shows promise for providing such connections if certain practical problems can be overcome. Novel implementation techniques are proposed which would demonstrate the practicality of complex interconnection patterns.
Document Details
- Document Type
- Technical Report
- Publication Date
- Feb 15, 1991
- Accession Number
- ADA231884
Entities
People
- S. N. Bunker