Digital Logic Testing and Testability
Abstract
Electronic hardware is subject to defects that are introduced at the time of manufacture and failures that occur in the field. Because of the complexity of digital logic circuits, they are difficult to test. This report provides an overview of digital logic testing. It provides access to the literature and unifies terminology and concepts that have evolved in this field. It discusses the types and causes of failures in digital logic. This report presents the topics of logic and fault simulation, fault grading, test generation algorithms, and fault isolation. The discussion of testability measurement is useful for understanding testability requirements and analysis techniques. Design -for-testability and built in test techniques are presented.
Document Details
- Document Type
- Technical Report
- Publication Date
- Feb 01, 1991
- Accession Number
- ADA234123
Entities
People
- Warren H. Debany Jr.
Organizations
- Rome Laboratory