Efficient Parallel Algorithms on Restartable Fail-Stop Processors

Abstract

We study efficient deterministic executions of parallel algorithms on restartable fail-stop CRCW PRAMs. We allow the PRAM processors to be subject to arbitrary stop failures and restarts, that are determined by on-line adversary, and that result in loss of private memory but do not affect shared memory. For this model, we define and justify the complexity measures of: completed work, where processors are charged for completed fixed-size update cycles, and overhead ratio, which amortizes the work over necessary work and failures. We observe that P = N restartable fail-stop processors, the Write-All problem requires omega(N log N) completed work, and this lower bound holds even under the additional assumption that processors can read and locally process the entire shared memory at unit cost. Under this unrealistic assumption we have a matching upperbound. The lower bound also applies to the expected completed work of randomized algorithms that are subject to on line adversaries. Finally, we describe a simple on-line adversary that causes inefficiency in may randomized algorithms.

Open PDF

Document Details

Document Type
Technical Report
Publication Date
Jan 01, 1991
Accession Number
ADA236249

Entities

People

  • Alex A. Shvartsman
  • Paris C. Kanellakis

Organizations

  • Brown University

Tags

Communities of Interest

  • Energy and Power Technologies
  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Accounting
  • Algorithms
  • Arrays
  • Computations
  • Computers
  • Computing System Architectures
  • Efficiency
  • Fault Tolerance
  • Instruction Set Architecture
  • Instructions
  • Iterations
  • Network Architecture
  • Parallel Computing
  • Recovery
  • Simulations
  • Standards
  • Trees (Data Structures)

Readers

  • Applied Combinatorial Optimization and Logic Circuit Design.
  • Graph Algorithms and Convex Optimization.
  • Parallel and Distributed Computing.