LimitLESS Directories: A Scalable Cache Coherence Scheme
Abstract
Caches enhance the performance of multiprocessors by reducing network traffic and average memory access latency. However, cache-based systems must address the problem of cache coherence. We propose the LimitLESS directory protocol to solve this problem. The LimitLESS scheme uses a combination of hardware and software techniques to realize the performance of a full-map directory with the memory overhead of a limited directory. This protocol is supported by Alewife, a large-scale multiprocessor. We describe the architectural interfaces needed to implement the LimitLESS directory, and evaluate its performance through simulations of the Alewife machine.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 01, 1991
- Accession Number
- ADA237629
Entities
People
- Anant Agarwal
- David Chaiken
- John Kubiatowicz
Organizations
- Massachusetts Institute of Technology