Linear Microcircuit Fault Modeling and Simulation
Abstract
Fault analysis in analog microcircuits is useful for tracing the effects of process variations during IC production that lead to circuit failure. Likewise, fault analysis can target specific failure mechanisms that occur during fabrication and field use of ICs. Furthermore, fault analysis is a necessary step in grading the testability of a microcircuit, as well as determining the fault coverage of a specific test suite. This report describes an approach which has aimed to develop systematic methods that can detect faults in analog and mixed-mode ICs by analyzing the response signatures of good and faulted ICs. In this study, these signatures were obtained from circuit simulations, but empirical data may also be used. Classical multivariate discrimination techniques were used to classify a tested circuit as good or bad , with identification of the most likely fault occurring in the circuit. Calibration of the method relied on extensive circuit simulation under nominal and faulted circuit operation. Nominal variations in the IC components and component/model parameters were accounted for during calibration and fault classification/detection by use of Monte Carlo methods.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 01, 1991
- Accession Number
- ADA238709
Entities
People
- Benjamin R. Epstein
- Martin H. Czigler
- Steven R. Miller
Organizations
- Sarnoff Corporation