Gallium Arsenide Pilot Line for High Performance Components.

Abstract

The Gallium Arsenide Pilot Line for High Performance Components (Pilot Line III) is to develop a facility for the fabrication of GaAs logic and memory chips. Physical and electrical analysis conclusively demonstrated that the EFET problem was caused by residual A1GaAs remaining in the EFET tubs. For our Self Aligned Refractory Gate Integrated Circuit (SARGIC) process to perform as designed, the FET gates must be placed directly on Gallium Arsenide. Residual A1GaAs increases the FET thresholds and thereby substantially changes device characteristics. We solved the problem by developing a new etch process using a PP etchant (H3PO4 and H2O2). A1GaAs is now completedly removed from EFET tubs and EFET threshold control has been restored. With wafer starts suspended and other program work minimized to conserve resources, there was little primary circuit testing. A new result is that the 32-Bit Multiplier is functional at 60 MHz.

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Document Details

Document Type
Technical Report
Publication Date
Aug 08, 1991
Accession Number
ADA239955

Entities

People

  • E. F. Lapham
  • Robert C. Vehse

Tags

Communities of Interest

  • Materials and Manufacturing Processes

DTIC Thesaurus Topics

  • Data Analysis
  • Data Science
  • Electron Microscopes
  • Electron Microscopy
  • Experimental Design
  • Fabrication
  • Failure Mode And Effect Analysis
  • Frequency
  • Gallium Arsenides
  • Information Science
  • Integrated Circuits
  • Logic Gates
  • Manufacturing
  • Mass Spectrometry
  • Metal-Semiconductor Junctions
  • Statistical Analysis
  • Test Equipment

Readers

  • Integrated Circuit Design and Technology.
  • Semiconductor Device Technology
  • Software Engineering

Technology Areas

  • Microelectronics