A Front End Filter Subsystem for an Adaptive Radar Signal Processor

Abstract

This report documents the front end subsystem portion of an eight- channel, adaptive nulling, radar signal processor test bed. The subsystem implements in excess of 12 billion operations per second on incoming data to effect signal conditioning through time-domain filtering. The hardware has been prototyped on eight circuit boards, each about 120 square inches, which are roughly half-populated. Compact packaging schemes are discussed in one of the appendices. This effort represents a demonstration of the technology required for a variety of on-board signal processors. Wherever possible, fault-tolerant design techniques and radiation-tolerant components have been used. The front end subsystem receives eight channels of sampled data from the eight radar receiver A/D modules at the conversion rate of 4.5 MHz. The front end employs finite impulse response (FIR) filters to perform inphase and quadrature signal separation, channel equalization, and pulse compression. The coefficients for these filters are programmable via a VMEbus compatible interface.

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Document Details

Document Type
Technical Report
Publication Date
Jul 12, 1991
Accession Number
ADA241028

Entities

People

  • C. B. Robins

Organizations

  • Massachusetts Institute of Technology

Tags

Communities of Interest

  • Advanced Electronics
  • Energy and Power Technologies

DTIC Thesaurus Topics

  • Application-Specific Integrated Circuits
  • C Programming Language
  • Circuit Boards
  • Complementary Metal-Oxide Semiconductors
  • Computer Programming
  • Converters
  • Data Transmission
  • Decoding
  • Failure Mode And Effect Analysis
  • Integrated Circuits
  • Printed Circuits
  • Pulse Compression
  • Radar
  • Radar Receivers
  • Radar Signals
  • Radiation
  • Test Beds

Fields of Study

  • Engineering
  • Physics

Readers

  • Integrated Circuit Design and Technology.
  • Phased Array Antenna Design.
  • Software Engineering