Guidance, Navigation and Control Digital Emulation Technology Laboratory. Volume 6. Task 6: GN&C Processor Test and Evaluation
Abstract
CERL has developed a set of VLSI (Very Large Scale Integration) chip set for the guidance, navigation, and control of high the next generation interceptors for the Strategic Defense Initiative applications. The processor is called the GN and C processor and collectively the VLSI chip set is called the GN and C chip set. The GN and C processor consists of three functional types: executive processor, signal processor, data processor, and interconnection network. The VLSI chips that had been developed for the executive processor are the GT-VIAG and GT-VDAG. The VLSI chips that had been developed for the signal processor are the GT-VNUC, GT-VTF, GT-VTHR, GT-VSF, GT-VCLS, and GT-VCTR. The VLSI chips that had been developed for the data processor are the GT-VSEQ, GT- VDR, GT-VFPU. The VLSI chips that had been developed for the interconnection network are GT-VSM8 and GT-VSNI. The GT-VFPU chip developed for the data processor is also used on the executive processor. All of the GN and C chip set except the GT-VNUC and GT-VTF had been fabricated and tested. The GT-VNUC and the GT-VTF are currently being fabricated. This document presents the test and evaluation methodology for the GN and C chip set, the GN and C processor board, and the development of special test board.
Document Details
- Document Type
- Technical Report
- Publication Date
- Sep 27, 1991
- Accession Number
- ADA241697
Entities
People
- Cecil O. Alford
- Sei S. Tan
Organizations
- Georgia Tech Research Corporation