Program Translation Tools for Systolic Arrays
Abstract
The work under this contract has concentrated on Parallel Program Generators for a systolic array (the Warp machine). A Parallel Program Generator (PPG) translates a program description for a single address space and a single thread of control into code for each of the nodes in parallel distributed memory system. We investigated three different approaches, each is discussed in more detail in a separate section: (1) Use of data parallelism to execute independent iterations on different cells; (2) Transformation of nested loops to systolic programs; and (3) Multi-model code mapping for a side-effect free program. All PPGs produce code that is then translated into Warp microcode by the W2 compiler developed with funding from ONR and DARPA. In addition, we build a debugger for Warp. Most of this work was reported on in the last interim report and is not repeated here.
Document Details
- Document Type
- Technical Report
- Publication Date
- Jun 30, 1991
- Accession Number
- ADA242924
Entities
People
- H. T. King
- Thomas Gross
Organizations
- Carnegie Mellon University