Massively Parallel Algorithms for Trace-Driven Cache Simulations
Abstract
A cache is a high-speed memory on the access path to a larger, slower main memory. Cache performance is critical to the overall performance of computer systems (10), and consequently a tremendous amount of effort is put into the evaluation of cache designs. This is particularly true for RISC microprocessor designs, where the ratio of the time needed to access an off-chip cache to that needed to access the main memory can be as high as 10 (10), and the off-chip cache is typically at least 10 times smaller than the main memory. Trace-driven simulations, which evaluate cache performance on actual reference streams taken from characteristic programs, are the most reliable and widely used tools for cache design evaluation. These simulations require a great deal of computation, because of the many different design possibilities that are simulated, and because of the length of the reference traces that drive the simulation.
Document Details
- Document Type
- Technical Report
- Publication Date
- Nov 01, 1991
- Accession Number
- ADA244295
Entities
People
- Albert G. Greenberg
- Boris D. Lubachevsky
- David M. Nicol