Video-Text Processing by Using Motorola 68020 CPU and its Environment
Abstract
The objective of this thesis is to design a small, stand-alone microcomputer using the MC68020 CPU and its environment. It is dedicated to one of the most common jobs of microcomputers: Video-Text Generation. Therefore, it is named 'VTG (Video-Text Generator)'. VTG consists of a CPU (MC68020), CRT controller (MC6845), and DUART (MC6868). The CRT Controller processes and generates the NTSC standard video-synchronization and video-text signals. The DUART accomplishes asynchronous serial communication with the Keyboard unit and allows for the parallel communication via its parallel port, with peripherals. The VTG has four 32 KB of RAM for main memory and one 16 KB of RAM for the CRT Controller Refresh Memory. The system software and the initialization routine is saved in 32 KB of ROM. Memory management and the generation of chip control signals are accomplished by two PALs (Programmable Logic Arrays) and two EPLDs (Erasable Programmable Logic Device). The CPU, PALs, EPLDs, and Memory chips in the VTG work at a speed of 8 MHz, while the CRT Controller works at 2 Mhz. In addition, the system has a Video Synchronization and Multiplexing Unit which make it possible to synchronize the VTG's video-text signal with an external video signal. Accomplishing this, the system can place its text information into any NTSC standard video picture. To perform these jobs, the system does not need another microcomputer or aid. It can work as a stand-alone system. In this thesis, the whole VTG system has been designed and implemented. Each PAL and EPLD was tested with a Logic Analyzer. Proper simulations were performed and observed to work properly, as they were programmed.
Document Details
- Document Type
- Technical Report
- Publication Date
- Mar 01, 1991
- Accession Number
- ADA245775
Entities
People
- M. K. Hekimoglu
Organizations
- Naval Postgraduate School